Double-floating-gate van der Waals transistor for high-precision synaptic operations Author Hoyeon Cho, Donghyun Lee, Kyungmin Ko, Dur-Yuh Lin, Beomsung Park, Byung Chul Jang Co-author Dong-Hyeok Lim, and Joonki Suh Journal ACS Nano Vol 17 Page 7384 - 7393 (2023) [IF:15.8] Year 2023 Link https://pubs.acs.org/doi/full/10.1021/acsnano.2c11538 305회 연결 Hoyeon Cho, Donghyun Lee, Kyungmin Ko, Dur-Yuh Lin, Beomsung Park, Byung Chul Jang, Dong-Hyeok Lim*, and Joonki Suh*, "Double-floating-gate van der Waals transistor for high-precision synaptic operations" ACS Nano 17, 7384-7393 (2023) [IF:17.1] 목록 이전글Strengthening Multi-Factor Authentication through Physically Unclonable Functions in PVDF-HFP-Phase-Dependent a-IGZO Thin-Film Transistors 24.03.21 다음글Imidazole-based artificial synapses for neuromorphic computing: Cluster-type conductive filament via controllable nanocluster nucleation 24.03.14