Intelligent Memory Computing Device Laboratory
# means first author, * means corresponding author.
"Scalable High-Voltage Pass Transistor Structures: Physics-based and Variation-Aware Evaluation Toward 1000 Layer 3D NAND Flash"
Namju Kim#, Hyeun Woo Shin#, Chae Eun Kim, Woo Cheol Shin, Suk-Kang Sung*, Byung Chul Jang*, IEEE International Reliability Physics Symposium (IRPS), Tucson, USA (2026)
"Unified Numerical Modeling of Program Efficiency in 3D NAND Flash: An Enabler for Design Optimization of Advanced 3D NAND Architecture"
Ki Han Kim, Woo Cheol Shin, Chae Eun Kim, Ju Han Park, Yoohyun Noh, Ju-Yeob Lee, Sang Hyun Oh, Byung Chul Jang*, IEEE International Reliability Physics Symposium (IRPS), Tucson, USA (2026)
"Proposal of Block Erase and Verify Schemes for Ferroelectric NAND: Overcoming Critical Challenges from Threshold Voltage Polarity"
Song-Hyeon Kuk, Bong Ho Kim, Youngkeun Park, Hyeon-Seong Hwang, Jae-Hoon Han, Byung Jin Cho, Byung Chul Jang, Sang-Hyeon Kim, IEEE International Memory Workshop (IMW), Monterey, USA (2025)
"Understanding of Incremental Step Pulse Programming (ISPP) Slope Degradation in 3D NAND and its Band-Engineered Trap Layer Solution"
Ki Han Kim, Woo Cheol Shin, Ui Do Ji, Yeong Kwon Kim, Namju Kim, Han Byeol Oh, Sang Hyun Oh, Byung Chul Jang, IEEE International Reliability Physics Symposium (IRPS), Monterey, USA (2025)
"Investigation on String Select Line Transistor Structure of Removing the Dummy Hole for High-density 3D NAND Flash"
Hee Seung Kim, and Byung Chul Jang, ICEIC International Conference on Electronics, Information and Communication, Osaka, Japan (2025)
"Numerical Model of Anode Hole Injection-based Degradation for NAND Flash Memory"
Han Byeol Oh, and Byung Chul Jang, ICEIC International Conference on Electronics, Information and Communication, Osaka, Japan (2025)
"Analysis of MoS2-based Transistor and NAND Flash Memory Performance"
Ki Han Kim, and Byung Chul Jang, ICEIC International Conference on Electronics, Information and Communication, Osaka, Japan (2025)
"A Numerical Model for Resistive Switching and Potentiation/Depression Behavior of Electrochemical Metallization Memristor"
Yeong Kwon Kim, and Byung Chul Jang, ICEIC International Conference on Electronics, Information and Communication, Osaka, Japan (2025)
"True Random Number Generator Based on Memristor Array for Medical Image Synthesis Using Generative Network."
Namju Kim, and Byung Chul Jang, ICEIC International Conference on Electronics, Information and Communication, Osaka, Japan (2025)
"MoS2-based Nonvolatile Memory for High-Density in-Memory Computing Application"
[Invited talk]Byung Chul Jang, International Conference on Electronic Materials and Nanotechnology for Green Environment (ENGE) 2024, Jeju, Korea 2024.11.27
"Impact of Removing the Dummy Channel Holes for High-density 3D NAND Flash memory"
Hee Seung Kim, Byung Chul Jang, The 21th International Symposium on the Physics of Semiconductors and Applications (ISPSA) 2024, Jeju, Korea 2024.06.02
"Quantitative Modeling of the Endurance Deragdation for NAND Flash Memory"
Han Byeol Oh, Byung Chul Jang, The 21th International Symposium on the Physics of Semiconductors and Applications (ISPSA) 2024, Jeju, koera 2024.06.02
"Quantitative Modeling of the Endurance Degradation for Nand Flash Memory"
Han Byeol Oh, Byung Chul Jang, The 31th Korean Conference on Semiconductors, Gyeongju , Korea January 24 (2024)
"Vertical Side-Wall MoS2 Channel Transistors : Thickness of 0.65nm and 6.5nm"
Ki Han Kim, Huimin Lee, Joonki Suh, and Byung Chul Jang, The 31th Korean Conference on Semiconductors, Gyeongju , Korea 2024.01.24
"A physics-based Numerical Model for Potentiation/Depression Characteristics of Electrochemical Metallization Memristor"
Yeongkwon Kim, Byung Chul Jang, The 31th Korean Conference on Semiconductors, Gyeongju , Korea 2024.01.24